Chip scale packaging using chip-on-flex technology

descriptionPublicationkeyboard_double_arrow_right Article 22 Nov 2002Publisher:IEEEJournal:1997 Proceedings 47th Electronic Components and Technology Conference

Authors: R. Fillion; B. Burdick; D. Shaddock; P. Piacente;

doi: 10.1109/ectc.1997.606238

Chip scale packaging using chip-on-flex technology

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Abstract

An increasing number of electronic designers, fabricators and users see Chip Scale Packaging (CSP) as a way to obtain the benefits foreseen in multichip packaging and Chip-on-Board (COB) without the problems and limitations currently associated with each. The Chip-on-Flex (COF) multichip packaging technology has been demonstrated to be applicable to single chip packages that meet chip scale packaging goals. This paper looks at the Chip-on-Flex Chip Scale technology and addresses issues including the process, structure, assembly, yields and reliability.

Related Organizations

General Electric (United States)
United States

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