The quantum-dot cellular automata (QCA) are one of the few alternative computing platforms that meet most of the criteria desired for computing platforms of the future. One of the basic concepts that has popularized the QCA platform to computer designers is adiabatic pipelining, which implicitly assures the correct data flow and in this view simplifies digital design. When designing QCA devices this should be taken advantage of instead of copying digital device designs that were optimized for the CMOS technology. One of the basic digital devices and probably a vital part of many modern computing platforms is the comparator. We here present a novel approach to comparator design, which takes advantage of adiabatic pipelining. Our analysis was based on the QCADesigner tool.