In this paper we address the issue of analyzing the effects of negative bias temperature instability (NBTI) on ICs' soft error susceptibility. We show that NBTI reduces significantly the critical charge of nodes of both combinational and sequential circuits during their in-field operation. Furthermore, we prove that combinational circuits present a higher relative reduction of node critical charge than sequential ones. Therefore, as an IC ages, the soft-error susceptibility of its combinational parts will increase much more than that of its sequential parts. This poses new challenges to ICs' soft error susceptibility modeling, mandating a time dependent modeling (in contrast to the static modeling broadly considered till now), and a diverse time dependent modeling for their combinational and sequential parts.