
handle: 11589/20102
The paper reports a highly repeatable 10-bits 3.8 GHz phase shifter implemented in a standard 0.35 µm SiGe technology for high precision applications. The prototype principle of operations and design are thoroughly described and demonstrated. The generated 0.35° phase step exhibits a rms error lower than 0.32°, mainly determined by the PLL inserted in the architecture.
Antennas array; Phase shifter; Phased Locked Loop
Antennas array; Phase shifter; Phased Locked Loop
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