
handle: 11588/391135
Modern reconfigurable technologies can have a number of inherent advantages for cryptanalytic applications. Aimed at the cryptanalysis of the SHA-1 hash function, this work explores this potential showing new approaches inherently based on hardware reconfigurability, enabling algorithm and architecture exploration, input-dependent system specialization, and low-level optimizations based on static/dynamic reconfiguration. As a result of this approach, we identified a number of new techniques, at both the algorithmic and architectural level, to effectively improve the attacks against SHA-1. We also defined the architecture of a high-performance FPGA-based cluster, that turns out to be the solution with the highest speed/cost ratio for SHA-1 collision search currently available. A small-scale prototype of the cluster enabled us to reach a real collision for a 72-round version of the hash function.
SHA-1 cryptanalysis; FPGA cluster; FPGA-based HPC, SHA-1 cryptanalysis, FPGA cluster, FPGA-based HPC
SHA-1 cryptanalysis; FPGA cluster; FPGA-based HPC, SHA-1 cryptanalysis, FPGA cluster, FPGA-based HPC
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