Interconnect design is one of the biggest challenges in high frequency VLSI design. Interconnect design methodology has experienced a series of transitions: from lumped resistance (R), lumped resistance and capacitance (RC), distributed RC, to distributed RLC models. As the clock frequency of microprocessors entered the giga-hertz regime, semiconductor industry started to validate RLC-based interconnect extraction at tens of GHz. Significant mismatch between measurements and RLC models was observed at multi-GHz frequencies on 3D interconnect structures (M.J. Kobrinsky et al., 2003). In contrast, full-wave electromagnetic-based modeling accurately captured the measured behavior over the entire frequency band (M.J. Kobrinsky et al., 2003), (Dan Jiao et al., 2003). This finding demonstrated the importance of electromagnetic analysis in high-frequency on-chip interconnect design.