Intellectual property (IP) blocks reuse is essential for facilitating the design process of system-on-a-chip. Sharing IP designs still poses significant high security risks not only to copyright but also to design authenticity. Intruders, or even competitors, can make design changes to IPs, which can lead to the loss of the ownerpsilas credibility. In this paper, we are trying to solve such challenge by proposing a novel fragile IP watermarking technique. The proposed technique protects hardware designs from alteration or any modifications that might occur to the design. The approach utilizes existing transitions in a finite state machine (FSM) component of an IP and does not result on any overhead to the IP design. Finally, we implemented the algorithm proposed and tested it.