Satellites are extensively used by public and private sectors to support a variety of services. Considering the cost and the strategic importance of these spacecrafts, it is fundamental to utilize strong cryptographic primitives to assure their security. However, it is of utmost importance to consider fault tolerance in their designs due to the harsh environment found in space, while keeping low area and power consumption. Therefore, this paper proposes novel fault tolerant schemes for the SHA-2 family of hash functions and analyzes their resistance to SEUs. Results obtained through FPGA implementation show that our best fault tolerant scheme for SHA-512 uses up to 32% less area and consumes up to 43% less power than the commonly used TMR technique. Moreover, its memory and registers are 435 and 175 times more resistant to SEUs than TMR. These results are crucial for supporting low area and low power fault tolerant cryptographic primitives in satellites.