Network-on-chips (NoCs) are the dominant interconnection technique in modern system-on-chips (SoCs). The medium access technique used in the physical layer of NoC routers profoundly impacts the performance and footprint of the router. Code division multiple access (CDMA) is a medium access technique widely deployed in various wireless communication systems, and it has recently been proposed as a prominent switching method for NoC routers. In a CDMA crossbar, several processing elements (PEs) can communicate simultaneously over a single communication channel by applying the direct-sequence spread spectrum technique to digital interconnects. However, existing CDMA switches are bit-wise architectures in which a binary data bit is spread and serially communicated on an exclusive digital channel while replicating this configuration to communicate multiple data bits, which increases the crossbar area and wiring density. In this work, we propose aggregated CDMA (ACDMA) to improve the area, throughput, and power consumption of existing CDMA NoC routers. ACDMA exploits the static nature and relative noise immunity of on-chip interconnects to aggregate transmission of multiple data bits into M-ary symbols on a single digital communication channel, which significantly reduces the wiring density and area overhead of the crossbar. Serial and parallel variants of the ACDMA crossbar offering a wide range of area-speed trade-offs are implemented in the ASIC $65~nm$ standard cell technology. The implementation results show that the throughput-per-area (TPA) of the serial and parallel ACDMA crossbars is improved by 96.3%, 18.2%, and 118.6%; and 400%, 255.3%, and 184.2% compared to the serial and parallel counterparts of the Walsh Basis (WB), Standard Basis (SB), and Overloaded CDMA Interconnect (OCI) crossbars, respectively. A 65-node ACDMA NoC router is fully realized and compared to the state-of-the-art CDMA and CONNECT NoC routers under multiple synthetic workloads. Communication reliability of the ACDMA NoC router subject to noise is investigated and a hybrid ARQ approach is proposed to improve the interconnect reliability.