A rail-to-rail input/output CMOS power amplifier

descriptionPublicationkeyboard_double_arrow_right Article 01 Jan 1989Publisher:Institute of Electrical and Electronics Engineers (IEEE)Journal:IEEE Journal of Solid-State Circuits, volume 25, pages 501-504 (issn: 0018-9200,

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Authors: Matthijs D. Pardoen; Marc G. R. Degrauwe;

doi: 10.1109/4.52177 , 10.1109/cicc.1989.56832

A rail-to-rail input/output CMOS power amplifier

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Abstract

A rail-to-rail input/output CMOS amplifier is presented in which the shortcomings presented in previous designs have been eliminated. The small (0.3-mm2) amplifier has an acceptable common-mode rejection ratio (55 dB), valid for the entire common-mode range. The device handles up to 4 nF, and on a 5-V supply it drives 3.8 V pp into 100 O (0.1% total harmonic distortion, 10 kHz)

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Swiss Center for Electronics and Microtechnology (Switzerland)
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