Capabilities of the CMOS inverter are introduced that are based on the theory that for V/sub Tn/= mod V/sub Tn/ mod approximately=2/3V/sub SS/, a third high-impedance (HI) valid logic state is created between the zero and one states. By the generation of a 'HALF' level (=1/2V/sub SS/), the inverter can be used as a tristate inverter. Circuit techniques to propagate the HALF level are given. This enables the general design of tertiary logic circuits and possibly tertiary arithmetic circuits. Two application examples are given. Illustrative experiments based on commercial ICs have been carried out, and results that verify the theory are given. This should open the way for digital circuits and applications. Improvements on the HALF propagation are needed which, in addition to the circuit level, may be thought of on the process and/or the device levels. >