Object-oriented extensions to hardware description languages let engineers model systems at a higher level of abstraction, thus helping them manage design complexity and maximize component reuse. OO-VHDL, the object-oriented extension of VHDL that we describe in this article, supports the VHDL computation model and the reactive computation model within the same system. We hope this will help modelers develop a smooth transition from abstract models to detailed hardware models. In implementing the extensions, we were guided by one goal: providing the language to modelers as quickly as possible. This meant OO-VHDL had to be usable in current VHDL simulation environments. Thus, we have implemented a preprocessor that translates OO-VHDL to VHDL and a debugging tool that maps VHDL statements into the OO-VHDL statements from which they were derived. >