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IEEE Transactions on Computers
Article . 1996 . Peer-reviewed
License: IEEE Copyright
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Article . 1996
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https://dx.doi.org/10.1109/12....
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https://dx.doi.org/10.1109/12....
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A modified TRAM architecture

descriptionPublicationkeyboard_double_arrow_right Article 01 Jan 1996Publisher:Institute of Electrical and Electronics Engineers (IEEE)Journal:IEEE Transactions on Computers, volume 45, pages 969-974 (issn: 0018-9340, Copyright policy )
Authors: Suresh Rai; V. P. Kirpalani;

doi: 10.1109/12.536239

A modified TRAM architecture

Abstract

This paper modifies the tree RAM (TRAM) architecture (Jarwala and Pradhan, 1988) of multimegabit dynamic random access memories using a tree-star (TS) interconnection topology. The modified TS-RAM design offers a reduced access time and an improved yield for the proposed TS-RAM architecture. We also propose an improved built-in self test (BIST) approach for the architecture.

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
1
Average
Average
Average
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