As the mainstream MOS technology is scaled into the deep sub-micron regime, development of a truly physical and predictive compact model for circuit simulation that covers geometry, bias, temperature, d.c.. a.c., RF, and noise characteristics becomes a major challenge. Well-constructed models, however, without accurate model parameters for the used process, may lead to wrong prediction in circuit simulation. Model parameter extraction, in particular from the device characterisation is crucial and remains as an important practical issue that needs serious attention. The surface-potential is based approach is being developed using solutions of several long-standing problems of compact modelling. These include symmetric linearisation method enabling extremely simple yet accurate expressions for the drain current and terminal charges, non-iterative computation of the surface potential and extension of the model formulation beyond the gradual channel approximation. Approaches to MOSFET compact models have been described. A big advantage of a complete surface-potential-based model is that the overall model consistency is auto matically preserved through the surface potential. Therefore, the number of model parameters can be drastically reduced in comparison with conventional models. The modelling of partially-depleted SOI MOSFETs using the third-generation surface-potential-based models has been discussed. An SP-based model has been shown to be an alternative to the more traditional threshold-voltage-based SOI models. Modelling issues for heterostructure MOSFETs are outlined, which need further attention. A subcircuit model for RF CMOS valid under different bias conditions and RF frequency range up to 20 GHz has been described. The usefulness and accu racy of the n-MOSFET model are discussed. A method to extract the important parameters and fine tuning of the parameters from d.c. and RF measurements is also discussed.