
arXiv: 2008.09633
In this Letter, the authors propose a low‐complexity estimator for the correlation coefficient based on the signed process. The introduced approximation is suitable for implementation in low‐power hardware architectures. Monte Carlo simulations reveal that the proposed estimator performs comparably to the competing methods in the literature with maximum error in order of . However, the hardware implementation of the introduced method presents considerable advantages in several relevant metrics, offering more than 95% reduction in dynamic power and doubling the maximum operating frequency when compared to the reference method.
Signal Processing (eess.SP), Methodology (stat.ME), FOS: Computer and information sciences, Hardware Architecture (cs.AR), FOS: Electrical engineering, electronic engineering, information engineering, Electrical Engineering and Systems Science - Signal Processing, Computer Science - Hardware Architecture, Statistics - Computation, Statistics - Methodology, Computation (stat.CO)
Signal Processing (eess.SP), Methodology (stat.ME), FOS: Computer and information sciences, Hardware Architecture (cs.AR), FOS: Electrical engineering, electronic engineering, information engineering, Electrical Engineering and Systems Science - Signal Processing, Computer Science - Hardware Architecture, Statistics - Computation, Statistics - Methodology, Computation (stat.CO)
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