Optimised CORDIC‐based atan2 computation for FPGA implementations

descriptionPublicationkeyboard_double_arrow_right Article 01 Sep 2017 English Publisher:Institution of Engineering and Technology (IET)Journal:Electronics Letters, volume 53, pages 1,296-1,298 (issn: 0013-5194, eissn: 1350-911X,

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Authors: V. Torres; J. Valls; M.J. Canet;

doi: 10.1049/el.2017.2090

Optimised CORDIC‐based atan2 computation for FPGA implementations

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Abstract

A method for the implementation of the atan2 operator based on the coordinate rotation digital computer algorithm is described. In the proposal, the computation of the z ‐path takes advantage of the look‐up table‐based FPGA resources to reduce by between 17 and 25%, without performance deterioration, the overall area of the unrolled architecture.

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Universitat Politècnica de València
Spain

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