Abstract The paper describes various modified algorithms of classical sinusoidal pulse width modulation (PWM) serving for a three-phase two-level inverter control. The paper presents the results of a research of 3 PWM versions with varying duty cycle parameters and frequency of the pulse signal modulation. The method is to divide the modulated sinusoidal signal cycle (half-cycle) into intervals in order to change the modulation frequency within the separate sectors of forming the quasi-sinusoidal output voltage waves. In addition, algorithmic ways to compensate the additional losses in the inverter and the induction motor at high modulation frequencies of a discrete control signal are investigated and described in the paper. Calculations and simulations are performed by NI Multisim simulation program and NI LabVIEW visual programming environment. Theoretical studies are performed using the electric drive theories, discrete control systems and spectral analysis. The practical implementation performed by Texas Instruments Stellaris Launchpad using the Energia prototyping platform, field-programmable gate arrays (FPGA) of National Instruments CompactRIO-9074 and NI Single-Board RIO GPIC (sbRIO-9606, NI 9683 (GPIC), LX45 FPGA) using NI LabVIEW software and add-on modules (LabVIEW Real Time, LabVIEW FPGA). The suggested inverter control methods make it possible to reduce the distortion of the output quasi-sinusoidal signal and reduce the power consumption of the DC link while significantly reducing the number of inverter transistor switching in comparison with the classical method without premodulation or technical devices (filter-compensating devices).