MEMS technology integrated in the CMOS back end

descriptionPublicationkeyboard_double_arrow_right Article 01 Sep 2010 English Publisher:Elsevier BVJournal:Microelectronics Reliability, volume 50, pages 1,593-1,598 (issn: 0026-2714,

Copyright policy )Funded by:EC | ATHENIS

Authors: Gaddi R.; Van Kampen R.; Unamuno A.; Joshi V.; Lacey D.; Renault M.; Smith C.; +2 Authors

doi: 10.1016/j.microrel.2010.07.113

MEMS technology integrated in the CMOS back end

- Summary
- Metrics

Abstract

The Nanomech™ MEMS technology platform which implements arrays of MEMS devices embedded inside the CMOS back end is described. The key advantages of this integration approach are described in terms of achieving a reliable MEMS technology process within competitive cost requirements, without any need for dedicated process, material and packaging development. The choice of materials is also providing a strong and reliable technology for harsh environment applications where cost is also a key. Data is shown providing a broad picture of the Nanomech™ technology and its potentials for applications.

Impact byBIP!

	selected citations These citations are derived from selected sources. This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).	29
	popularity This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.	Top 10%
	influence This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).	Top 10%
	impulse This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.	Top 10%