Abstract The DCIV method was applied to investigate negative bias temperature instability (NBTI) in SiO 2 gate oxides. The DCIV technique, which measures the interface defect density independently from bulk oxide charges, delineates the contribution of the interface defect generation to the overall NBTI measured by the threshold voltage shift, Δ V TH . The DCIV results obtained during both stress and relaxation phases are generally consistent with the main features of the reaction–diffusion (R–D) model, which suggests positive charge generation/annealing at the Si/SiO 2 interface due to breaking/re-passivation of the Si–H bonds. These results are in agreement with the spin-dependent recombination (SDR) experiments, which reflect the density of the Si dangling bonds at the Si/SiO 2 interface ( P b centers) and its vicinity ( E ′ centers). Comparison of degradation kinetics as measured by DCIV, charge-pumping, and I D − V G (Δ V TH ) techniques, however, suggests that Δ V TH includes additional contributions, most likely from the oxide bulk charges. For comparison, an NBTI study was also performed on the high-k HfO 2 /SiO 2 gate stacks. After adjusting for the high-k related contribution, similar kinetics of the long-term stress interface trap generation was observed in SiO 2 and high-k gate stacks suggesting a common mechanism of the interface degradation.