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image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Microelectronic Engi...arrow_drop_down
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Microelectronic Engineering
Article . 2009 . Peer-reviewed
License: Elsevier TDM
Data sources: Crossref
image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao
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Gate dielectric degradation in CMOS inverters

Authors: MARTIN MARTINEZ J; GERARDIN, SIMONE; RODRIGUEZ R; NAFRIA M; AYMERICH X; PACCAGNELLA, ALESSANDRO; GHIDINI G.;

Gate dielectric degradation in CMOS inverters

Abstract

To study the gate oxide degradation under stress conditions closer to the actual operation of devices in circuits, in this work, CMOS inverters have been stressed using DC and pulsed signals at the input. Uniform and non-uniform Fowler-Nordheim and Channel Hot Carrier stresses have been identified as those governing the oxide degradation, depending on the input signal, and modifying the electrical response of the device. In particular, a decrease of the saturation current is observed, which depends on the transistor type (NMOS or PMOS), input signal, and stress time. The results show larger degradations in the NMOS when the input frequency is increased, which has been attributed to the Channel Hot Carriers contribution during the output state transitions in the inverter. Also the impact of the different stresses on the circuit output is analyzed and related to the degradation of the devices. A shift in the inverter voltage transfer characteristic has been observed, whose direction depends on the degradation that the transistors have suffered, being more important at elevated frequencies.

Country
Italy
Keywords

CMOS technology; gate oxide; reliability

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
0
Average
Average
Average
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