A new generation of high speed microprocessors has become the standard in a number of workstation environments. The technology, RISC, has made high speed processing a reality at a relatively low price. The basic design goal of the RISC is aimed at higher speed execution of application programs and was based on an analysis of volumes of such code. It is not clear, however that the resulting RISC instruction sets are appropriate for implementing operating systems that run on these hardware platforms. In the current work, we look at some of the issues associated with RISC designs and how well these designs support the operating systems that run on them.