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image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao The Journal of VLSI ...arrow_drop_down
image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao
The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology
Article . 1993 . Peer-reviewed
License: Springer TDM
Data sources: Crossref
DBLP
Article . 1993
Data sources: DBLP
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Vlsi programmable digital filter for video signal processing

Authors: Giulio Casagrande; Armando Chiari; Carla Golla; Salvatore Miceli;

Vlsi programmable digital filter for video signal processing

Abstract

High speed digital filtering is required in real time video signal processing, as well as high order filters are needed to match television studio signal quality. The hardware complexity involved by such system constraints may be faced by a two-fold approach, concerning both the architecture and the technological aspects of a specific electronics device devoted to the above task. This article deals with a processor especially developed for the purpose of fast digital video signal applications, such as filtering, equalization, interpolation and so on. The nonrecursive transposed F.I.R. (Finite Impulse Response) structure has been selected, which exhibits a linear phase behavior. A novel approach has been developed for the multipliers implementation, by optimizing an EPROM based look-up table storing the products between all video samples and the filter coefficients significant bits, resulting in a programmable system. TheProgrammable Filter Processor has been designed with a high level of parallelism and pipelining and a 1.2 µm CMOS EPROM, single metal technology has been employed for the integration process of the chip. This has been successfully production-tested for 40 Msamples/s throughput rate, thus both allowing to meet most video filtering applications and demonstrating the potentialities of nonvolatile memory technologies in embedded applications. Moreover multiple devices can be interconnected to yield multiprocessor structures for more demanding performances such as, cascaded or longer filters, input signal precision extension, computation improved accuracy, increased throughput rate, and two-dimensional signal processing.

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
1
Average
Average
Average
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