
doi: 10.1007/bf01075093
Summary: Algorithms are constructed for calculating single and complete minimal tests for linear single-channel logic circuits. Estimates for the length and for the general number of tests are obtained.
combinational circuits, minimal tests, linear single- channel logic circuits, Fault detection; testing in circuits and networks, fault detection
combinational circuits, minimal tests, linear single- channel logic circuits, Fault detection; testing in circuits and networks, fault detection
| selected citations These citations are derived from selected sources. This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically). | 1 | |
| popularity This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network. | Average | |
| influence This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically). | Average | |
| impulse This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network. | Average |
