The Reconfigurable Adaptive Computing Environment (RACE) is a complete environment for reconfigurable computing. The RACE system provides the ability for run-time reconfiguration as well as multiple, simultaneous applications. A hardware library is the key part of the computing environment, allowing for the quick simulation of applications and hardware-software co-execution. Time-consuming functions can be specified in VHDL and added to the hardware library, which are then linked into a user's C program for hardware execution of the functions. The RACE hardware consists of a DMA interface and five Xilinx XC4013 FPGAs, providing approximately 52,000 gates of logic.