Traditionally, digital logic designs in undergraduate courses are described on paper and implemented with TTL SSI/MSI components. These standard logic devices have proven to be an inexpensive approach, but require “wirewrapping” and other similar means of circuit board assembly; as a result, a significant portion of the students' effort is focused on completing and debugging the physical connections between devices. This paper describes an alternative approach using Field Programmable Gate Arrays that avoids these assembly issues, allowing the students to focus on the logic design process, with the added benefit of exposing the students to the use of modem CAE tools.