Research in Instruction-Level Parallelism (ILP) is concerned with architectural innovations in the processor to expose parallelism between the execution of instructions. Of course, the relationship with the research on the memory hierarchy and on compiler optimisation techniques is very strong. Another point is that such a research needs tools to simulate the mechanisms. Thus, researchers have to develop their tools. Such a tool is detailed in the paper on code cloning tracing by Lafage et al from IRISA.