AbstractThis paper presents a practical method for managing and predicting the yield of VLSI products, in a manner that will provide insight, with a minimum of mathematical complexity, into the sensitivity of the yield to the different quantities which limit it. The yield equation is cast into a form which makes evident the contributions of its constituent terms and the formulation is developed in a manner that permits its ready application to yield characterization, diagnostics and prediction. An illustrative example is presented that integrates the concepts and methods developed.