Permutation layout

descriptionPublicationkeyboard_double_arrow_right Article 01 Sep 1978 English Publisher:WileyJournal:Networks, volume 8, pages 253-278 (issn: 0028-3045, eissn: 1097-0037,

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Authors: M. Cutler; Yossi Shiloach;

doi: 10.1002/net.3230080308

Permutation layout

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Abstract

AbstractThe problems of layout of printed circuits and large scale integrated chips are very complex and are therefore usually approached by heuristic methods.This paper presents a more analytic approach to an elementary subset of these problems, using combinatorial and graphtheoretic arguments.

Related Organizations

Weizmann Institute of Science
Israel

Keywords

Graph theory, Permutations, words, matrices, Permutation Layout, Node Paths

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