Powered by OpenAIRE graph
Found an issue? Give us feedback
image/svg+xml art designer at PLoS, modified by Wikipedia users Nina, Beao, JakobVoss, and AnonMoos Open Access logo, converted into svg, designed by PLoS. This version with transparent background. http://commons.wikimedia.org/wiki/File:Open_Access_logo_PLoS_white.svg art designer at PLoS, modified by Wikipedia users Nina, Beao, JakobVoss, and AnonMoos http://www.plos.org/ Труды Института сист...arrow_drop_down
image/svg+xml art designer at PLoS, modified by Wikipedia users Nina, Beao, JakobVoss, and AnonMoos Open Access logo, converted into svg, designed by PLoS. This version with transparent background. http://commons.wikimedia.org/wiki/File:Open_Access_logo_PLoS_white.svg art designer at PLoS, modified by Wikipedia users Nina, Beao, JakobVoss, and AnonMoos http://www.plos.org/
Труды Института системного программирования РАН
Article . 2010
Data sources: CyberLeninka - Russian open access scientific library
Claim

This Research product is the result of merged Research products in OpenAIRE.

You have already added 0 works in your ORCID record related to the merged Research product.

Метод зеркальной генерации ограничений для построения тестовых программ по тестовым шаблонам

descriptionPublicationkeyboard_double_arrow_right Article 01 Jan 2010 Russian Publisher:Федеральное государственное бюджетное учреждение науки Институт системного программирования Российской академии наукJournal:Труды Института системного программирования РАН (issn: 2079-8156, eissn: 2220-6426, Copyright policy )

Метод зеркальной генерации ограничений для построения тестовых программ по тестовым шаблонам

Abstract

Статья относится к области системного функционального (core-level) тестирования микропроцессоров, более точно модулей управления памяти. В статье описывается метод построения тестов (тестовой программы) для нацеленной генерации. Такая генерация предполагает систематичное построение тестов специального вида. В конце приводятся результаты апробации реализации метода для тестирования модулей управления памяти микропроцессоров архитектуры MIPS64.

Keywords

ФУНКЦИОНАЛЬНОЕ ТЕСТИРОВАНИЕ МИКРОПРОЦЕССОРОВ,ТЕСТИРОВАНИЕ МОДУЛЕЙ УПРАВЛЕНИЯ ПАМЯТИ,МИКРОПРОЦЕССОРЫ АРХИТЕКТУРЫ MIPS64

  • BIP!
    Impact byBIP!
    selected citations
    These citations are derived from selected sources.
    This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
    		 0
    popularity
    This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
    		 Average
    influence
    This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
    		 Average
    impulse
    This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
    		 Average
Powered by OpenAIRE graph
Found an issue? Give us feedback
selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
0
Average
Average
Average
gold