Background/Objectives: The FFT computation is a widely used building block in signal processing. In this work, radix-2 butterfly is implemented by distributed arithmetic algorithm (DAA). Methods/Statistical Analysis: The distributed arithmetic distributes the calculations in a bit-serial manner, thereby the lumped multiplications are eliminated. Findings: Designing of butterfly is done using Verilog HDL, simulation is done in Cadence NC Sim tool, and synthesis is done in Cadence RTL compiler. The proposed architecture provides high speed and less area compared with existing architecture. The proposed structure requires less power compared to existing structure. Improvements/Applications: The DA is used in many applications of DSP functions like filtering, FFT, DCT.