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Twin Butterfly High Throughput Parallel Architecture FFT Algorithm

descriptionPublicationkeyboard_double_arrow_right Article 01 Dec 2008Publisher:IEEEJournal:2008 International Symposium on Information Science and Engineering
Authors: null Wang Chao; null Han Yun Peng;

doi: 10.1109/isise.2008.108

Twin Butterfly High Throughput Parallel Architecture FFT Algorithm

Abstract

A novel parallel memory accessing for decimation-in-time twin butterfly parallel architecture radix-4 FFT algorithm is proposed, which is based on "in-place" principle and allows conflict-free access to the 8 operands needed for calculation of the twin butterfly distributed over 8 parallel memory modules. Data and twiddle factor address generation algorithm and store scheme are described detailed. Comparison with conventional methods is also presented.

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
2
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