Implementation of matrix decomposition structures of 2-D digital filters via VLSI array processors
Copyright policy )Implementation of matrix decomposition structures of 2-D digital filters via VLSI array processors
This paper describes an implementation of 2-D FIR and IIR linear digital filters via VLSI array processors. The underlying realization structures are based on the matrix decomposition approach. The 2-D concurrent processing is used in order to implement the row and column delays within the cycle time. A high degree of concurrency is achieved by exploiting the pipelining of the array processors with the inherent parallelism of the matrix decomposition structure. The resulting structures are modular, and regular, use only local communication and internal local feedback loops, and achieve high throughput and sampling rates.
- University of Toronto Canada
- Democritus University of Thrace Greece
Design techniques (robust design, computer-aided design, etc.), Digital control/observation systems, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), Filtering in stochastic control theory
Design techniques (robust design, computer-aided design, etc.), Digital control/observation systems, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), Filtering in stochastic control theory
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