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image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao https://doi.org/10.1...arrow_drop_down
image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao
https://doi.org/10.1109/iccke4...
Article . 2019 . Peer-reviewed
License: STM Policy #29
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Design Space Exploration of the AES Encryption Algorithm Implementation for Securing CAN Protocol

Authors: Mohamad Sadegh Monfared; Hamid Noori; Mohammad Amin Abazari;

Design Space Exploration of the AES Encryption Algorithm Implementation for Securing CAN Protocol

Abstract

IoT technology is growing very fast and one of the requirements of this technology is integrating different communications protocols and networks. In an IoT network, security of such a heterogeneous and large network is very important. Transport systems are part of this super network and in-vehicle protocols are used in such systems. Unfortunately, the Controller Area Network (CAN) protocol, the most popular protocol in the systems, designed without security in mind. In this paper, the Advanced Encryption Standard (AES), an encryption algorithm, is used to prevent masquerade and replay attacks in order to secure CAN protocol to an appropriate level. The paper has a plan to explore for an efficient implementation of AES encryption algorithm for the communication protocol. These implementations have been evaluated on an FPGA ML605 development board. The best implementation of the AES among 8-, 16-, 32- and 64-bit data paths has been investigated. The most important criteria for the protocol in these AES designs are such as consumed power, area, and cost in addition to providing better throughput. The 64-bit structure of the designed AES is selected which has the frequency of 21.4 MHz, significant throughput of 412.39 Mbps, reasonable area of 784 slice on Spartan III FPGA.

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
0
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