Automatic synthesis of Boolean equations using programmable array logic

descriptionPublicationkeyboard_double_arrow_right Article 01 Jan 1989Publisher:ACM PressJournal:Proceedings of the 1989 26th ACM/IEEE conference on Design automation conference - DAC '89

Authors: R. P. Goré; K. Ramaamohanarao;

doi: 10.1145/74382.74430

Automatic synthesis of Boolean equations using programmable array logic

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Abstract

We present a methodology and prototype system that automates the synthesis of combinational logic using Programmable Array Logic chips (PALs). (FOOTNOTE: PAL is a trademark of Monolithic Memories Inc.) The input is a set of boolean equations and a database of available PALs. The output is a set of equivalent equations, a set of chosen PALs and a mapping specifying which equations to implement on which PAL.

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University of Melbourne
Australia

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