
With an enlarging community using electronic design automation, it is a prominent challenge to provide simulation program with integrated circuit emphasis (SPICE) users with sophisticated integrated circuit (IC) models, since many analog IC manufacturers provide software models in SPICE format. Multi-core technology-based processors deliver better performance-to-cost ratios relative to their single-core predecessors through on-chip multithreading. In this article, we present a parallel version of a SPICE3 circuit simulator using two well-known shared-memory multithread programming interfaces. Two approaches in multithread programming has been considered and proposed to parallelize SPICE3 programs in shared-memory multiprocessor systems. Also, OpenMP and Pthreads libraries are considered to realize the proposed approaches that are used to redesign the SPICE3 device-loading functions. Case studies using SRAM circuits as input data were investigated. They consist of MOS devices modeled using BSIM3 models. Pe...
| selected citations These citations are derived from selected sources. This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically). | 0 | |
| popularity This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network. | Average | |
| influence This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically). | Average | |
| impulse This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network. | Average |
