Implementation and performance of a binary lattice gas algorithm on parallel processor systems
Copyright policy )Implementation and performance of a binary lattice gas algorithm on parallel processor systems
We study the performance of a lattice gas binary algorithm on a ``real arithmetic'' machine, a 32 processor INTEL iPSC hypercube. The implementation is based on so-called multi-spin coding techniques. From the measured performance we extrapolate to larger and more powerful parallel systems. Comparisons are made with ``bit'' machines, such as the parallel connection machine.
- The Ohio State University United States
``real arithmetic'' machine, 32 processor INTEL iPSC hypercube, Rarefied gas flows, Boltzmann equation in fluid mechanics, multi-spin coding techniques, lattice gas binary algorithm, Parallel numerical computation
``real arithmetic'' machine, 32 processor INTEL iPSC hypercube, Rarefied gas flows, Boltzmann equation in fluid mechanics, multi-spin coding techniques, lattice gas binary algorithm, Parallel numerical computation
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