We present an integrated frequency multiplier-by-six (sextupler) for signal generation at J-band (220–325 GHz) frequencies. Typically, multiplication-by-six in state-of-the-art designs is achieved by cascading frequency tripler and doubler circuits. In contrast, we propose to accomplish the multiplication-by-six in a single bootstrapped Gilbert cell (BGC) by leveraging odd-harmonic generation in the transconductance stage and self-mixing in the switching quad. A circuit analysis of the harmonic generation and mixing mechanisms is presented and verified through simulations. The sextupler is combined with a balance-compensated transformer (TF) balun at the input and a cascode amplification stage to increase the output power. As proof-of-concept, a prototype is fabricated in an advanced 130-nm SiGe BiCMOS technology with a core area of only 0.06 mm2. The circuit demonstrates a measured peak conversion gain (CG) of 7 dB and output power of up to 4.3 dBm at 257 GHz with a dc power consumption of 119 mW, resulting in a leading-edge dc-to-RF efficiency of 2.2%. All undesired harmonics are suppressed by more than 20 dBc over the entire 3-dB bandwidth, ranging from 238–278 GHz. Compared to recently published silicon-based frequency sextuplers operating at simlar frequencies, our proposed single-stage approach results in a significant reduction of dc power and silicon area, while maintaining a superior dc-to-RF efficiency and competitive output power.