
handle: 11568/805049
AbstractWe introduce a DSL based toolchain supporting the design of parallel applications where parallelism is structured after parallel design pattern compositions. A DSL provides the possibility to write high level parallel design pattern expressions representing the structure of parallel applications, to refactor the pattern expressions, to evaluate their non-functional properties (e.g. ideal performance, total parallelism degree, etc.) and finally to generate parallel code ready to be compiled and run on different target architectures. We discuss a proof-of-concept prototype implementation of the proposed toolchain generating FastFlow code and show some preliminary results achieved using the prototype implementation.
Design space exploration; DSL; Non-functional concerns; Parallel design patterns; Computer Science (all), Parallel design patterns, non-functional concerns, name=General Computer Science, 004, design space exploration, DSL, /dk/atira/pure/subjectarea/asjc/1700/1700; name=General Computer Science, parallel design patterns, Design space exploration, Non-functional concerns, /dk/atira/pure/subjectarea/asjc/1700/1700
Design space exploration; DSL; Non-functional concerns; Parallel design patterns; Computer Science (all), Parallel design patterns, non-functional concerns, name=General Computer Science, 004, design space exploration, DSL, /dk/atira/pure/subjectarea/asjc/1700/1700; name=General Computer Science, parallel design patterns, Design space exploration, Non-functional concerns, /dk/atira/pure/subjectarea/asjc/1700/1700
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