
doi: 10.1109/26.950341
Summary: Block Cyclic Redundancy Check (CRC) codes represent a popular and powerful class of error detection techniques used almost exclusively in modern data communication systems. Though efficient, CRCs can detect errors only after an entire block of data has been received and processed. In this work, we exploit the ``continuous'' nature of error detection that results from using arithmetic codes for error detection, which provides a novel tradeoff between the amount of added redundancy and the amount of time needed to detect an error once it occurs. We demonstrate how this continuous error detection framework improves the overall performance of communication systems, and show how considerable performance gains can be attained. We focus on several important scenarios: 1) automatic repeat request (ARQ) based transmission; 2) forward error correction (FEC) frameworks based on (serially) concatenated coding systems involving an inner error-correction code and an outer error-detection code; and 3) reduced state sequence estimation (RSSE) for channels with memory. We demonstrate that the proposed CED framework improves the throughput of ARQ systems by up to 15\% and reduces the computational/storage complexity of FEC and RSSE by a factor of two in the comparisons that we made against state-of-the-art systems.
Arithmetic codes, automatic repeat request, decision feedback equalizers, forward error correction, Modulation and demodulation in information and communication theory, arithmetic codes, error detection coding
Arithmetic codes, automatic repeat request, decision feedback equalizers, forward error correction, Modulation and demodulation in information and communication theory, arithmetic codes, error detection coding
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