The current Java memory model is flawed and has many unintended implications. As multithreaded programming becomes increasingly popular in Java and hardware memory architectures become more aggressively parallel, it is of significant importance to provide a framework for formally analyzing the Java memory model. The Mur/spl phi/ verification system is applied to study the commit/reconcile/fence (CRF) memory model, one of the proposed thread semantics to replace the present Java memory model. The CRF proposal is formally specified using the Mur/spl phi/ description language. A suite of test programs is designed to reveal pivotal properties of the model. The results demonstrate the feasibility of applying model checking techniques to language level memory model specifications. Not only can it help the designers to debug their designs, it also provides a formal mechanism for Java programmers to understand the subtleties of the Java memory model.