Truth of information in any communication system is very critical. Use of forward error correction (FEC) to lower the probability of error and increase transmission distance has become common. Reed-Solomon is a block FEC, capable of correcting multiple errors, specifically focusing on burst errors, making it widespread for storage devices, and wireless and mobile communication units. This paper presents an implementation of a (7,3) Reed-Solomon encoder-decoder using VHSIC hardware description language (HDL). The encoder downloaded into Altera MAX 7128 CPLD for functional and timing verification, and decoder is ready for fabrication.