A check nodes correction approximate Min-sum decoding algorithm for LDPC is proposed in this paper. The degradation factor of BP to MS is found to do expansion and optimization based on hardware working manner. The decoding algorithm summarized a correction approximate algorithm based on different SNR situations and hardware implementation. The simulation is based on LDPC NR 3GPP 38.212 release and the comparison results showed the proposed check nodes correction approximate Min-sum decoding algorithm can have a better BER and iteration time performance. The hardware of this proposed algorithm is based on Min-sum decoder and the extra cost is only a shifter and an adder besides the memory.