
Stepping from natural language towards modern formal languages such as LNT is beneficial for specifying hardware architectures. We illustrate this on the HPDcache, the informal specification of which contains numerous fragments in pseudo-code. Due to the syntactical similarities between the latter and LNT, modeling the HPDcache’s informal specification in LNT was greatly facilitated. The CADP tools supporting LNT enabled us to spot an error in the informal specification of the HPDcache, which might have led to a violation of the memory consistency rules of the RISC-V.
Formal verification, [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Cache Coherence, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Memory consistency model, [INFO.INFO-MO] Computer Science [cs]/Modeling and Simulation, Hardware design, Concurrent processes, [INFO.INFO-FL] Computer Science [cs]/Formal Languages and Automata Theory [cs.FL]
Formal verification, [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Cache Coherence, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Memory consistency model, [INFO.INFO-MO] Computer Science [cs]/Modeling and Simulation, Hardware design, Concurrent processes, [INFO.INFO-FL] Computer Science [cs]/Formal Languages and Automata Theory [cs.FL]
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