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Publication . Article . 2020

CMOS Circuit Design for Classification of ST and VT Arrhythmia Based on Morphological Analysis using Neural Network Classifier

D. Hari Priya; D. Ravali;
Open Access  
Published: 28 Feb 2020 Journal: International Journal of Engineering and Advanced Technology, volume 9, pages 1,283-1,287 (eissn: 2249-8958, Copyright policy )
Publisher: Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
Abstract
Ventricular tachycardia is a life threatening medical emergency. Discerning dangerous ventricular rhythms with safe Sinus tachycardia based on heart rate is very tough as they are having similar heart rate. Most of the existing research used time information for classification which may lead false alarm. Hence a CMOS circuit is proposed to classify ventricular-tachycardia based on morphological changes in QRS complex. The design includes sample and hold circuit for sampling QRS complex, mapping circuit for map the given input signal to unit length, hamming neural network and winner take all circuits for classification of ventricular tachycardia. This design is implemented using 180nm CMOS technology with the operating voltage and power consumption of 19.81µW.
Subjects by Vocabulary

Microsoft Academic Graph classification: Neural network classifier Pattern recognition Ventricular tachycardia medicine.disease medicine Morphological analysis Sinus tachycardia medicine.symptom Cmos circuit design Computer science Artificial intelligence business.industry business

Medical Subject Headings: cardiovascular diseases cardiovascular system

Subjects

Computer Science Applications, General Engineering, Environmental Engineering, Sinus tachycardia, Ventricular tachycardia, arrhythmia classifier, Hamming Neural Network, WTA Networks, 2249-8958, B4114129219/2020©BEIESP