publication . Conference object . 2017

Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology

Alfio Di Mauro; Davide Rossi; Antonio Pullini; Philippe Flatresse; Luca Benini;
Open Access English
  • Published: 01 Jan 2017
  • Publisher: IEEE
  • Country: Italy
Environmental temperature variations, as well as process variations, have a detrimental effect on performance and reliability of embedded systems implemented with deep-sub micron technologies. This sensitivity significantly increases in ultra-low-power (ULP) devices that operate in near-threshold, due to the magnification of process variations and to the strong thermal inversion that affects advanced technology nodes. Supporting an extended range of reverse and forward body-bias, UTBB FD-SOI technology provides a powerful knob to compensate for such variations. In this work we propose a methodology to efficiently compensate, at run-time, these variations. The pr...
Persistent Identifiers
free text keywords: embedded systems, integrated circuit design, integrated circuit reliability, low-power electronics, power aware computing, silicon-on-insulator, Magnification, Performance monitoring, Multi-core processor, Silicon on insulator, Environmental temperature, Computer science, Power consumption, Inversion (meteorology), Electronic engineering
Funded by
EC| ExaNoDe
European Exascale Processor Memory Node Design
  • Funder: European Commission (EC)
  • Project Code: 671578
  • Funding stream: H2020 | RIA
Validated by funder
FET H2020FET HPC: HPC Core Technologies, Programming Environments and Algorithms for Extreme Parallelism and Extreme Data Applications
FET H2020FET HPC: European Exascale Processor Memory Node Design
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