publication . Bachelor thesis . 2017

Characterization and Modeling of SiC Integrated Circuits for Harsh Environment

Kimoto, Daiki;
Open Access English
  • Published: 01 Jan 2017
  • Publisher: KTH, Skolan för informations- och kommunikationsteknik (ICT)
  • Country: Sweden
Abstract
Elektronik för extrema miljöer, som kan användas vid hög temperatur, hög strålning och omgivning med frätande gaser, har varit starkt önskvärd vid utforskning av rymden och övervakning av kärnreaktorer. Kiselkarbid (SiC) är en av kandidaterna inom material för extrema miljöer på grund av sin höga temperatur- och höga strålnings-tolerans. Syftet med denna avhandling är att karakterisera 4H-SiC MOSFETar vid hög temperatur och att konstruera SPICE modeller för 4H-SiC MOSFETar. MOSFET-transistorer karakteriserades till 500°C. Med användande av karaktäristik för en 4H-SiC NMOSFET med L/W = 10 µm / 50 µm, anpassades en SPICE LEVEL 2 kretsmodell. Modellen beskriver DC ...
Subjects
free text keywords: Silicon carbide, Harsh environment, High-temperature, Pseudo-CMOS, SPICE circuit simulation, Yield calculation, Extrema Miljöer, Hög tempeatur, SPICE kretssimulering, Utbytet uträkning, Electrical Engineering, Electronic Engineering, Information Engineering, Elektroteknik och elektronik, Computer and Information Sciences, Data- och informationsvetenskap
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Characterization ................................................................. 30 6.1. Operational amplifier (Opamp) ............................................................... 44 6.2. Candidate of inverter ................................................................................. 46 6.3. Operation analysis of pseudo-CMOS ...................................................... 48 6.3.1. Simulation condition.................................................................................................. 48 6.3.2. Discussion of simulation results............................................................................... 49 6.3.3. Design of pseudo-CMOS.............................................................................................51 6.4. Yield calculation of 4H-SiC integrated circuits....................................... 51 6.4.1. Calculation method .................................................................................................... 52 6.4.2. Calculation result........................................................................................................ 54 6.4.3. Scaling of pseudo-CMOS integrated circuits ......................................................... 56 6.5. Summary ......................................................................................................57 7.

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