publication . Conference object . 2004

Built-In Test Engine For Memory Test

McEvoy, Paul; Farrell, Ronan;
Open Access English
  • Published: 01 Jan 2004
  • Publisher: IEEE: Institute of Electrical and Electronics Engineers
  • Country: Ireland
Abstract
In this paper we will present an on-chip method for testing high performance memory devices, that occupies minimal area and retains full flexibility. This is achieved through microcode test instructions and the associated on-chip state machine. In addition, the proposed methodology will enable at-speed testing of memory devices. The relevancy of this work is placed in context with an introduction to memory testing and the techniques and algorithms generally used today.
Subjects
ACM Computing Classification System: Hardware_MEMORYSTRUCTURES
free text keywords: Electronic Engineering
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