publication . Conference object . 2004

Design of low voltage low power CMOS OP-AMPS with rail-to-rail input/output swing

S.V. Gopalaiah; A.P. Shivaprasad; S.K. Panigrahi;
Open Access
  • Published: 30 Jun 2004
  • Publisher: IEEE Comput. Soc
  • Country: India
A novel input and output biasing circuit to extend the input common mode (CM) voltage range and the output swing to rail-to-rail in a low voltage op-amp in standard CMOS technology is presented. The input biasing circuit uses a Switched Capacitor Based Attenuator (SCBA) approach to establish rail-to-rail common mode input voltage range. And the output biasing circuit uses an Output Driver (OD), with floating bias to give the rail-to-rail swing at output stage. Three different OD schemes in operational amplifier have been proposed and tested the performance with SCBA. The simulation results justify the theoretical analysis.
Persistent Identifiers
free text keywords: Electrical Communication Engineering, CMOS, Input offset voltage, Operational amplifier, law.invention, law, Low voltage, Biasing, Input/output, Switched capacitor, Electronic engineering, Engineering, business.industry, business, Attenuator (electronics)
Related Organizations

[1] S. Karthikeyan, Siamak Mortezapour, Anilkumar Tamminudi, Edward K. F. Lee, “Low-Voltage Analog Circuit Design Based on Biased Inverting Opamp Configuration,” IEEE Trans. on Circuits and Systems-II, Vol. 47, No. 3, pp. 176-184, March 2000.

[2] S. Sukurai and M. Ismail,”Robust design of rail-to-rail CMOS operational Amplifiers for a low power supply voltage,” IEEE JSSC. Vol. 31, pp.146-156, Feb. 1996.

[3] G. Palmisano, G. Palumbo,“Clock Booster for 1.2V SC Circuits,”Proc.IEEE ISCAS, Hong Kong, pp. 2012-2015, June 1997.

[4] B. Blalock, P. Allen and G. Rincon-Mora,” 1 V op-amps using standard digital CMOS Technology,” IEEE Trans. Circuit Syst. II, Vol. 45, pp. 769-780, July 1998.

[5] R. Griffith, R. Wyne, R. Dotson, and T. Petty, “A 1-V BiCMOS railto-rail amplifier with n-channel depletion mode input stage,” IEEE J. Solid-State Circuits, Vol.32, pp. 2012-2022, Dec. 1997.

[6] B. Davari, R. Dennard, and G. Shahidi, ”CMOS Scaling for High Performance and Low Power-The Next Ten Years,” Proc. IEEE, Vol. 83, pp. 595-606, April 1995.

[7] J. Francisco Duque-Carrillo, Jose L. Ausin, Guido Torelli, Jose M. Valverde, and Miguel A. Dominguez, 1-V Rail-to-Rail Operational Amplifiers in Standard CMOS Technology, IEEE J of Solid State Circuits, Vol. 35, No. 1, pp. 33-43, Jan. 2000.

[8] Sukanta Kishore Panigrahi, “Low-Voltage Micro power CMOS OpAmps with Rail-to-Rail Input Common Mode Range and Output Swing,” M.Sc(Engg.) Thesis, Electrical Sciences Division, Indian Instt. of Science, Dec.2001.

[9] A. Torralba R. G. Carvajal, J. Mertinez-Heradia, and J. RamirezAngulo, “Class AB Output stage for low voltage CMOS op-amps with accurate quiescent current control,” Electronics Letters, Vol. 36, No. 21, pp. 1753-1754, Oct. 2000.

[10] B. J. Hosticka,”Dynamic CMOS amplifiers,”IEEE J. Solid-State Circuits, Vol. SC-15, No. 9, pp. 887-894, Oct. 1980.

[11] Roubik Gregorian and Gabor C. Temes, “Analog MOS Integrated Circuits for Signal Processing.”John Wiley and Sons, New York. 1986. Chap. 4.

Any information missing or wrong?Report an Issue