publication . Conference object . Contribution for newspaper or weekly magazine . 2018

Mismatch Compensation Technique for Inverter-Based CMOS Circuits

Mroszczyk, Przemyslaw; Pavlidis, Vasileios;
Open Access
  • Published: 01 Jan 2018
  • Publisher: IEEE
  • Country: New Zealand
Abstract
Inverter-based CMOS circuits are often considered in the front-end modules for optical and wireline communication A-D conversion, and analogue computation. Due to parameter variability (mismatch), the performance of such circuits is usually degraded. This paper presents a mismatch compensation technique employing a set of redundant switches to trim the switching threshold of inverter-based CMOS circuits. Over 10× better parameter matching is observed at no additional energy cost or significant gate area increase, compared to “traditional” geometry scaling. The efficiency of the mismatch compensation is investigated across a broad design space considering the num...
Subjects
arXiv: Computer Science::Hardware ArchitectureComputer Science::Emerging Technologies
ACM Computing Classification System: Hardware_INTEGRATEDCIRCUITS
free text keywords: Inverter, Electronic engineering, Scaling, Wireline, Comparator, Optical switch, Computer science, Electronic circuit, Transistor, law.invention, law, CMOS
Related Organizations
Funded by
EC| ExaNoDe
Project
ExaNoDe
European Exascale Processor Memory Node Design
  • Funder: European Commission (EC)
  • Project Code: 671578
  • Funding stream: H2020 | RIA
Communities
FET H2020FET HPC: HPC Core Technologies, Programming Environments and Algorithms for Extreme Parallelism and Extreme Data Applications
FET H2020FET HPC: European Exascale Processor Memory Node Design
Powered by OpenAIRE Open Research Graph
Any information missing or wrong?Report an Issue
publication . Conference object . Contribution for newspaper or weekly magazine . 2018

Mismatch Compensation Technique for Inverter-Based CMOS Circuits

Mroszczyk, Przemyslaw; Pavlidis, Vasileios;