publication . Article . 2009

Test data generation for LRU cache-memory testing

Evgeni, Kornikhin;
Open Access Russian
  • Published: 01 Jan 2009 Journal: Proceedings of the Spring/Summer Young Researchers’ Colloquium on Software Engineering (eissn: 2311-7230, Copyright policy)
  • Publisher: Федеральное государственное бюджетное учреждение науки Институт системного программирования Российской академии наук
Abstract
System functional testing of microprocessors deals with many assembly programs of given behavior. The paper proposes new constraint-based algorithm of initial cache-memory contents generation for given behavior of assembly program (with cache misses and hits). Although algorithm works for any types of cache-memory, the paper describes algorithm in detail for basis types of cache-memory only: fully associative cache and direct mapped cache.
Subjects
ACM Computing Classification System: Hardware_MEMORYSTRUCTURES
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